# Internal Error (/home/hamlin/workspace/repos/github/jdk-master/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp:2302), pid=1755239, tid=1755266
# assert(Assembler::is_simm13(offset) && ((offset % 2) == 0)) failed: offset (4210) is too large to be patched in one beq/bge/bgeu/blt/bltu/bne instruction!


Current CompileTask:
C2:42304 1040 b 4 TestFloat16ScalarOperations::testFMAConstantFolding (410 bytes)

Stack: [0x00007fda6617e000,0x00007fda6637e000], sp=0x00007fda66379200, free space=2028k
Native frames: (J=compiled Java code, j=interpreted, Vv=VM code, C=native code)
V [libjvm.so+0xf3c018] MacroAssembler::pd_patch_instruction_size(unsigned char*, unsigned char*)+0x23c (macroAssembler_riscv.cpp:2302)
V [libjvm.so+0x4a15b8] Label::patch_instructions(MacroAssembler*)+0xc0 (macroAssembler_riscv.hpp:491)
V [libjvm.so+0x5e8fe0] float16_to_float_slow_path(C2_MacroAssembler&, C2GeneralStub<FloatRegister, Register, Register>&)+0x30 (macroAssembler_riscv.hpp:868)
V [libjvm.so+0x5e3e4c] C2CodeStubList::emit(C2_MacroAssembler&)+0x70 (c2_CodeStubs.cpp:47)
V [libjvm.so+0x10d1398] PhaseOutput::fill_buffer(C2_MacroAssembler*, unsigned int*)+0x1750 (output.cpp:1857)
V [libjvm.so+0x10d27fe] PhaseOutput::Output()+0x972 (output.cpp:361)
V [libjvm.so+0x76e02c] Compile::Code_Gen()+0x504 (compile.cpp:3017)
V [libjvm.so+0x770400] Compile::Compile(ciEnv*, ciMethod*, int, Options, DirectiveSet*)+0x1558 (compile.cpp:881)
V [libjvm.so+0x5f9574] C2Compiler::compile_method(ciEnv*, ciMethod*, int, bool, DirectiveSet*)+0x232 (c2compiler.cpp:141)
V [libjvm.so+0x77b7d6] CompileBroker::invoke_compiler_on_method(CompileTask*)+0x8ec (compileBroker.cpp:2331)
V [libjvm.so+0x77c222] CompileBroker::compiler_thread_loop()+0x416 (compileBroker.cpp:1975)
V [libjvm.so+0xb90c34] JavaThread::thread_main_inner()+0x114 (javaThread.cpp:776)
V [libjvm.so+0x1491a48] Thread::call_run()+0x86 (thread.cpp:231)
V [libjvm.so+0x10aee1c] thread_native_entry(Thread*)+0x106 (os_linux.cpp:877)
C [libc.so.6+0x67552]
C [libc.so.6+0xb3b86]
Registers:
pc =0x00007fdac5b3c018
x1(ra) =0x00007fdac5b3be06
x2(sp) =0x00007fda66379200
x3(gp) =0x0000555555558800
x4(tp) =0x00007fda6637d8e0
x5(t0) =0x0000000000000000
x6(t1) =0x00007fdac5b3d0be
x7(t2) =0x0000000000000010
x8(s0) =0x00007fda66379230
x9(s1) =0x00007fda979d2db6
x10(a0) =0x0000000000000063
x11(a1) =0x0000000000001000
x12(a2) =0x0000000000000000
x13(a3) =0x0000000000000001
x14(a4) =0x0000000000000058
x15(a5) =0x00007fdac7f32000
x16(a6) =0x000000000000f06f
x17(a7) =0x000000000000006f
x18(s2) =0x0000000000001072
x19(s3) =0x00007fda979d3e28
x20(s4) =0x00007fda18e1d930
x21(s5) =0x00007fdac6612bf0
x22(s6) =0x0000000000000007
x23(s7) =0x000000000000001d
x24(s8) =0x00007fdac6612bf0
x25(s9) =0x00007fda979d2180
x26(s10)=0x00007fda18e80790
x27(s11)=0x00007fda18dab020
x28(t3) =0x00007fdac677c118
x29(t4) =0x0000000000000000
x30(t5) =0x0000000000000000
x31(t6) =0x00007fda66378a58

Floating point state:
fcsr=1
Floating point registers:
f0=0x0000000000000000
f1=0x40202cbaa6b0ae50
f2=0x40cf400000000000
f3=0x40316edc8cedc7cc
f4=0x3fd44d5555555589
f5=0x3fafefc000000000
f6=0x0000000000000000
f7=0x0000000000000000
f8=0x0000000000000000
f9=0x0000000000000000
f10=0x3f0879726b68ab38
f11=0x40730a3b309ccee8
f12=0xc0509267583e44d2
f13=0x3fd5523fee151306
f14=0x7fefffffffffffff
f15=0x3f0879726b68ab38
f16=0x0000000000000000
f17=0x0000000000000000
f18=0x0000000000000000
f19=0x0000000000000000
f20=0x0000000000000000
f21=0x0000000000000000
f22=0x0000000000000000
f23=0x0000000000000000
f24=0x0000000000000000
f25=0x0000000000000000
f26=0x0000000000000000
f27=0x0000000000000000
f28=0x0000000000000000
f29=0x0000000000000000
f30=0x0000000000000000
f31=0x0000000000000000