Intel AVX10 extends and enhances the capabilities of Intel AVX-512 to
benefit all Intel® products and will be the vector ISA of choice moving into the future.
- It supports a new ISA versioning scheme which simplifies the existing AVX512 feature enumeration scheme. Feature set supported by an AVX10 ISA version will be supported by all the versions above it.
- The initial, fully-featured version of Intel® AVX10 will be enumerated as Version 2 (denoted as Intel® AVX10.2). This will include the new ISA extension over the existing AVX512 instructions.
- An early version of Intel® AVX10 (Version 1, or Intel® AVX10.1) that only enumerates the Intel® AVX-512 instruction set at 128, 256, and 512 bits will be enabled on the Granite Rapids Server for software pre-enabling.
benefit all Intel® products and will be the vector ISA of choice moving into the future.
- It supports a new ISA versioning scheme which simplifies the existing AVX512 feature enumeration scheme. Feature set supported by an AVX10 ISA version will be supported by all the versions above it.
- The initial, fully-featured version of Intel® AVX10 will be enumerated as Version 2 (denoted as Intel® AVX10.2). This will include the new ISA extension over the existing AVX512 instructions.
- An early version of Intel® AVX10 (Version 1, or Intel® AVX10.1) that only enumerates the Intel® AVX-512 instruction set at 128, 256, and 512 bits will be enabled on the Granite Rapids Server for software pre-enabling.
- causes
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JDK-8358566 Unsupported vpbroadcastd instruction emitted on Granite Rapids architecture
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- Closed
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- relates to
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JDK-8360116 Add support for AVX10 floating point minmax instruction
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- Open
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- links to
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Commit(master)
openjdk/jdk/3b336a9d
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Review(master)
openjdk/jdk/24329