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Bug
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Resolution: Fixed
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P4
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25
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master
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x86, aarch64
The IR test TestSubNodeFloatDoubleNegation.java fails when the machine it is running on has support for Float16. In that case, the compiler generates two half-float subtractions and an alternative codepath with a normal float subtraction. This was first discovered for RISC-V in JDK-8353665, but also applies to x64 with the feature AVX512-FP16 and needs to be investigated for ARMv8 with FEAT_FP16.
- caused by
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JDK-8351515 C2 incorrectly removes double negation for double and float
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- Resolved
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- duplicates
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JDK-8354222 TestSubNodeFloatDoubleNegation intermittently failing
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- Closed
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- relates to
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JDK-8353665 RISC-V: IR verification fails in TestSubNodeFloatDoubleNegation.java
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- Resolved
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JDK-8345125 Aarch64: Add aarch64 backend for Float16 scalar operations
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- Open
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- links to
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Commit(master) openjdk/jdk/efb5a80e
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Review(master) openjdk/jdk/24565
(1 links to)