The vector-scalar instructions in riscv_v.ad could be improved making it more consistent with the spec.

An example:

diff --git a/src/hotspot/cpu/riscv/riscv_v.ad b/src/hotspot/cpu/riscv/riscv_v.ad
index 7c1ca4f8960ab..74887a9672e3f 100644
--- a/src/hotspot/cpu/riscv/riscv_v.ad
+++ b/src/hotspot/cpu/riscv/riscv_v.ad

 // vector-immediate add (unpredicated)

-instruct vadd_immI(vReg dst, vReg src1, immI5 con) %{
+instruct vaddI_vi(vReg dst, vReg src1, immI5 con) %{
   match(Set dst (AddVB src1 (Replicate con)));
   match(Set dst (AddVS src1 (Replicate con)));
   match(Set dst (AddVI src1 (Replicate con)));
- format %{ "vadd_immI $dst, $src1, $con" %}
+ format %{ "vaddI_vi $dst, $src1, $con" %}
   ins_encode %{
     BasicType bt = Matcher::vector_element_basic_type(this);
     __ vsetvli_helper(bt, Matcher::vector_length(this));

--------------------------------------------------------------------------------

 // vector-scalar add (unpredicated)

-instruct vadd_regI(vReg dst, vReg src1, iRegIorL2I src2) %{
+instruct vaddI_vx(vReg dst, vReg src1, iRegIorL2I src2) %{
   match(Set dst (AddVB src1 (Replicate src2)));
   match(Set dst (AddVS src1 (Replicate src2)));
   match(Set dst (AddVI src1 (Replicate src2)));
- format %{ "vadd_regI $dst, $src1, $src2" %}
+ format %{ "vaddI_vx $dst, $src1, $src2" %}
   ins_encode %{
     BasicType bt = Matcher::vector_element_basic_type(this);
     __ vsetvli_helper(bt, Matcher::vector_length(this));