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Enhancement
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Resolution: Fixed
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P4
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25
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master
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riscv
PR https://github.com/openjdk/jdk/pull/20507 have added some new lanewise APIs for Vector API.
This includes Unsigned Vector Min / Max operations. But the RISC-V backend implementation for RVV is missing.
We should intrinsify this APIs for RISC-V to improve the performance.
This includes Unsigned Vector Min / Max operations. But the RISC-V backend implementation for RVV is missing.
We should intrinsify this APIs for RISC-V to improve the performance.
- relates to
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JDK-8355699 RISC-V: support SUADD/SADD/SUSUB/SSUB
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- Open
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- links to
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Commit(master) openjdk/jdk/2ed7ad4b
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Review(master) openjdk/jdk/24909