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Sub-task
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Resolution: Fixed
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P4
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26
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b08
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x86
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generic
Intel APX introduces a new feature called Push-Pop Acceleration (PPX), which adds a performance hint to legacy PUSH and POP instructions, enabling the PUSHP and POPP forms. The PPX hint improves performance by accelerating register value forwarding between matching push/pop pairs.
Purpose: PPX is a performance hint that allows the processor to bypass memory and the training loop of Fast Store Forwarding Predictor (FSFP) by directly forwarding data between paired PUSHP and POPP instructions.
Requirements: Both the PUSH and its matching POP must be marked with PPX. A "matching" pair accesses the same stack address (e.g., typical function prolog/epilog). Standalone PUSH instructions (e.g. for argument passing) must not be marked.
Encoding: PUSHP/POPP is a replacement for legacy PUSH/POP (0x50+rd / 0x58+rd) and uses REX2.W = 1 (implies 64-bit operand size). PPX cannot be encoded with 16-bit operand size as REX2.W overrides the 0x66 prefix.
Purpose: PPX is a performance hint that allows the processor to bypass memory and the training loop of Fast Store Forwarding Predictor (FSFP) by directly forwarding data between paired PUSHP and POPP instructions.
Requirements: Both the PUSH and its matching POP must be marked with PPX. A "matching" pair accesses the same stack address (e.g., typical function prolog/epilog). Standalone PUSH instructions (e.g. for argument passing) must not be marked.
Encoding: PUSHP/POPP is a replacement for legacy PUSH/POP (0x50+rd / 0x58+rd) and uses REX2.W = 1 (implies 64-bit operand size). PPX cannot be encoded with 16-bit operand size as REX2.W overrides the 0x66 prefix.
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Commit(master) openjdk/jdk/4994bd59
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Review(master) openjdk/jdk/25889