The current C1 implementation of AtomicLong methods
which either adds or exchanges (such as getAndAdd)
emit one of a ldaddal and swpal respectively when using
LSE as well as an immediately proceeding dmb. Since
ldaddal/swpal have both acquire and release semantics,
this provides similar ordering guarantees to a dmb.full
so the dmb here is redundant and can be removed.

This is due to both clause 7 and clause 11 of the
definition of Barrier-ordered-before in B2.3.7 of the
DDI0487 L.a Arm Architecture Reference Manual for A-profile
architecture being satisfied by the existence of a
ldaddal/swpal which ensures such memory ordering guarantees.