Currently, the FMA matcher for x86 only encodes FMA in the form a*b+c. If any of the operands are negated, an additional negation operation needs to be matched. However, x86 has additional FMA instructions that can encode forms such as a*b-c and -a*b+c in a single instruction. This would bring the x86 backend in line with other backends that support this feature, such as aarch64 and PPC.