Aarch32 C2 vector operations are emulated [1] on top of FPU instructions (due to incompatibility of simd instructions [2]) , working with float registers 0–31 while allocating [2] them from the full range of 0–61. This causes an assertion failure in debug mode and potentially invalid results in release binaries. Currently, we know that only JDK-8346999 is affected by this bug, but there may be more.

[1] https://github.com/openjdk/jdk/blob/45726a1f8b8f76586037867a32b82f8ab9b96937/src/hotspot/cpu/arm/arm.ad#L10250
[2] https://github.com/openjdk/jdk/blob/45726a1f8b8f76586037867a32b82f8ab9b96937/src/hotspot/cpu/arm/vm_version_arm.hpp#L103
[3] https://github.com/openjdk/jdk/blob/45726a1f8b8f76586037867a32b82f8ab9b96937/src/hotspot/cpu/arm/arm_32.ad#L280