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Enhancement
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Resolution: Unresolved
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P4
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17, 21, 25, 26
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Fix Understood
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generic
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generic
C2 doesn't align vector spill slots to the vector size.
Allocated register sets for vectors are adjacent and aligned (see RegMask::find_first_set())
but Matcher::_new_SP is only aligned to SlotsPerLong (== 2).
Therefore the _new_SP offsets of spill slots are unaligned if the alignment
of _new_SP does not match the alignment of the spill slots (represented by the register sets).
On AARCH64 and PPC64 vector spilling can require extra instructions if
SP offsets are not aligned to the vector sizes[1].
Alignment of _new_SP should match the largest vector limited by the stack alignment.
Note that higher alignment of _new_SP wouldn't enlarge the frame since the
required padding is mapped to the caller frame[2].
Example with unaligned spilling on AARCH64 and PPC64:
TestVectorSpilling.java contained in unaligned_spilling_example.patch (attached) produces unaligned vector spilling on AARCH64 and PPC64.
Step by step:
* git apply unaligned_spilling_example.patch
* configure for a fastdebug build
* make test TEST=compiler/vectorapi/TestVectorSpilling.java TEST_VM_OPTS="-Xlog:newcode=trace" JTREG=RETAIN=all
* grep -rh "\[newcode\]" test-support
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:312)
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:296)
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:280)
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:312)
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:280)
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:280)
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:280)
...
[1] Add instructions are emitted if spill offset is unaligned.
AARCH64: MacroAssembler::spill_address() and MacroAssembler::sve_spill_address()
https://github.com/openjdk/jdk/blob/2af4d20abfda4113a2bfcf34dfad87187c0f584d/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp#L3767
PPC64: MachSpillCopyNode::implementation()
https://github.com/openjdk/jdk/blob/2af4d20abfda4113a2bfcf34dfad87187c0f584d/src/hotspot/cpu/ppc/ppc.ad#L1824
[2] Alignment padding for _new_SP is mapped to the caller frame
https://github.com/openjdk/jdk/blob/92e380c59c2498b1bc94e26658b07b383deae59a/src/hotspot/cpu/aarch64/aarch64.ad#L3829
Allocated register sets for vectors are adjacent and aligned (see RegMask::find_first_set())
but Matcher::_new_SP is only aligned to SlotsPerLong (== 2).
Therefore the _new_SP offsets of spill slots are unaligned if the alignment
of _new_SP does not match the alignment of the spill slots (represented by the register sets).
On AARCH64 and PPC64 vector spilling can require extra instructions if
SP offsets are not aligned to the vector sizes[1].
Alignment of _new_SP should match the largest vector limited by the stack alignment.
Note that higher alignment of _new_SP wouldn't enlarge the frame since the
required padding is mapped to the caller frame[2].
Example with unaligned spilling on AARCH64 and PPC64:
TestVectorSpilling.java contained in unaligned_spilling_example.patch (attached) produces unaligned vector spilling on AARCH64 and PPC64.
Step by step:
* git apply unaligned_spilling_example.patch
* configure for a fastdebug build
* make test TEST=compiler/vectorapi/TestVectorSpilling.java TEST_VM_OPTS="-Xlog:newcode=trace" JTREG=RETAIN=all
* grep -rh "\[newcode\]" test-support
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:312)
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:296)
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:280)
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:312)
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:280)
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:280)
[0.986s][trace][newcode] spill_address: unaligned vector spill (size:16 sp offset:280)
...
[1] Add instructions are emitted if spill offset is unaligned.
AARCH64: MacroAssembler::spill_address() and MacroAssembler::sve_spill_address()
https://github.com/openjdk/jdk/blob/2af4d20abfda4113a2bfcf34dfad87187c0f584d/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp#L3767
PPC64: MachSpillCopyNode::implementation()
https://github.com/openjdk/jdk/blob/2af4d20abfda4113a2bfcf34dfad87187c0f584d/src/hotspot/cpu/ppc/ppc.ad#L1824
[2] Alignment padding for _new_SP is mapped to the caller frame
https://github.com/openjdk/jdk/blob/92e380c59c2498b1bc94e26658b07b383deae59a/src/hotspot/cpu/aarch64/aarch64.ad#L3829