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Bug
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Resolution: Fixed
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P2
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5.0, 5.0u1
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01
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x86, itanium
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generic, linux, linux_redhat_3.0
The amd64 vm, like the x86 vms, emits slightly different code depending
on the features supported by the platform it's running on. This is ok,
but we shouldn't unconditionally generate opteron-only code (in the
form of prefetchw) w/o checking. We currently do this in the inner
gc loops when invoking Prefetch::write, causing illegal instruction
faults on em64t.
on the features supported by the platform it's running on. This is ok,
but we shouldn't unconditionally generate opteron-only code (in the
form of prefetchw) w/o checking. We currently do this in the inner
gc loops when invoking Prefetch::write, causing illegal instruction
faults on em64t.
- duplicates
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- Closed
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JDK-5109434 Add Support for Intel EM64T Technology
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- Closed
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- relates to
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- Closed
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