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  1. JDK
  2. JDK-8262355

Support for AVX-512 opmask register allocation.

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    • Enhancement
    • Resolution: Fixed
    • P4
    • 17
    • 17
    • hotspot
    • None
    • b17
    • x86

    Description

      - AVX-512 added 8 new 64 bit opmask register (k0-k7). These registers enable predicated vector instruction such that an operation is performed only over vector lanes for which corresponding bit is set in opmask register.

      - Currently in order to support predicated vector operations in macro assembly routines computed masks are stored in hard coded opmask registers.

      - Cross instruction mask propagation is done either using a GPR or a vector a vector register.

      - Register allocation support for opmask register (k1-k7) will facilitate mask propagation across instruction and thus enable emitting efficient instruction sequence over X86 targets supporting AVX-512 feature.

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              jbhateja Jatin Bhateja
              jbhateja Jatin Bhateja
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                Updated:
                Resolved: