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Bug
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Resolution: Fixed
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P2
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17, 18
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b31
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x86
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Verified
| Issue | Fix Version | Assignee | Priority | Status | Resolution | Resolved In Build |
|---|---|---|---|---|---|---|
| JDK-8270122 | 18 | Jatin Bhateja | P2 | Resolved | Fixed | b06 |
| JDK-8270734 | 17.0.1 | Jatin Bhateja | P2 | Resolved | Fixed | b03 |
Currently a temporary operand with register class regD is used in rep_stos_evex and rep_stos_large_evex instruction patterns, whose encoding blocks calls xmm_clear_mem routine which has a VEX encoded instruction in the control path.
Thus regD class should be changed to legRegD on AVX512 platforms so that operand is always allocated from lower register bank (0-15).
There is one more issue related to usage of regD operand which is a scalar operand in a vector instruction, usually such cases may result into problems during spilling/restoration since only a scalar value is dumped and restored back, but in current context its a temporary operand may never get spilled.
Thus regD class should be changed to legRegD on AVX512 platforms so that operand is always allocated from lower register bank (0-15).
There is one more issue related to usage of regD operand which is a scalar operand in a vector instruction, usually such cases may result into problems during spilling/restoration since only a scalar value is dumped and restored back, but in current context its a temporary operand may never get spilled.
- backported by
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JDK-8270122 corrections in some instruction patterns for KNL x86 platform
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- Resolved
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- Resolved
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- relates to
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- Closed
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JDK-8262355 Support for AVX-512 opmask register allocation.
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- Resolved
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- Resolved
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