Uploaded image for project: 'JDK'
  1. JDK
  2. JDK-8295703

RISC-V: Remove implicit noreg temp register arguments in MacroAssembler

    XMLWordPrintable

Details

    • Enhancement
    • Resolution: Fixed
    • P4
    • 20
    • 20
    • hotspot
    • None
    • b21
    • riscv
    • linux

    Description

      Remove implicit `= noreg` temporary register arguments for the three methods that still have them.
        * `load_heap_oop`
        * `store_heap_oop`
        * `load_heap_oop_not_null`

      Only `load_heap_oop` is used with the implicit `= noreg` arguments.
      After JDK-8293769, the GCs only use explicitly passed in registers. This will also be the case for generational ZGC.
      Where it currently requires `load_heap_oop` to provide a second temporary register.

      Attachments

        Issue Links

          Activity

            People

              fyang Fei Yang
              fyang Fei Yang
              Votes:
              0 Vote for this issue
              Watchers:
              3 Start watching this issue

              Dates

                Created:
                Updated:
                Resolved: