RISC-V: Avoid passing t0 as temp register to MacroAssembler::lightweight_lock/unlock

This is inspired by https://bugs.openjdk.org/browse/JDK-8316880.
MacroAssembler::lightweight_lock/unlock is non-trivial on linux-riscv64 platform. Passing t0(aka x5) as temporary register to these two assember functions can also be error prone. As a reserved scratch register, t0 is implicitly clobberred by various assembler functions. This fixes the issue by finding and passing a different register, which is similar with https://bugs.openjdk.org/browse/JDK-8316880.