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  1. JDK
  2. JDK-8338881

GenShen: Use explicit third temp register for post barrier

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    • gc

    Description

      GenShen is still using the "out of the blue" register for the card barrier. Originally fixed here: https://bugs.openjdk.org/browse/JDK-8292868.

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          relates to

          Enhancement - null JDK-8292868 Explicitly pass a third temp register to MacroAssembler::store_heap_oop for aarch64

          • P4 - Minor loss of function, or other problem where easy workaround is present.
          • Resolved
          links to

          Commit Commit(master) openjdk/shenandoah/12af9f62

          Review Review(master) openjdk/shenandoah/486

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              wkemper William Kemper
              wkemper William Kemper
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                Created:
                Updated:
                Resolved: