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  1. JDK
  2. JDK-8292868

Explicitly pass a third temp register to MacroAssembler::store_heap_oop for aarch64

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    • gc
    • b13
    • aarch64

    Description

      Currently G1 (and Shenandoah) implicitly uses r3 on aarch64 in store_at.

      This out of the blue register fixed for x86 in JDK-8283186. This would be fixed in the same way on aarch64 by passing the temporary register explicitly so it is part of the GC api.

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          relates to

          Task - A task that needs to be done. JDK-8338881 GenShen: Use explicit third temp register for post barrier

          • P4 - Minor loss of function, or other problem where easy workaround is present.
          • Resolved

          Enhancement - null JDK-8283186 Explicitly pass a third temp register to MacroAssembler::store_heap_oop

          • P4 - Minor loss of function, or other problem where easy workaround is present.
          • Resolved
          links to

          Commit Commit openjdk/jdk/f91943c1

          Review Review openjdk/jdk/10019

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              aboldtch Axel Boldt-Christmas
              aboldtch Axel Boldt-Christmas
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                Updated:
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