RISC-V: Reconsider ConditionalMoveLimit when adding conditional move

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    • Type: Enhancement
    • Resolution: Fixed
    • Priority: P4
    • 25
    • Affects Version/s: 25
    • Component/s: hotspot
    • b20
    • riscv
    • linux

      RISC-V base ISA (RV64GCV) does not support conditional move, so we set `ConditionalMoveLimit` to 0 for this CPU platform. For performance reasons, we should reconsider this parameter when adding conditional move with Zicond extension.

            Assignee:
            Hamlin Li
            Reporter:
            Fei Yang
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              Created:
              Updated:
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