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  1. JDK
  2. JDK-8347917

AArch64: Enable upper GPR registers in C1

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      The ะก2 compiler uses almost all general purpose registers. Even r27 (rheapbase) and r29 (fp) are enabled conditionally (JDK-8233743 [0]).

      R19-r29 are callee-saved in the native ABI, but in C2 all registers are caller-saved (see comment in aarch64.ad [1]) and stubs handle the appropriate transitions.

      The C1 compiler only uses r0-r18 on AArch64. r19-r26 are currently declared as callee-saved and not used. So r19-r26 can be declared as caller-saved and enabled, r27 (rheapbase) and r29 (fp) can be declared caller-saved and enabled conditionally similar to C2.

      [0] https://bugs.openjdk.org/browse/JDK-8233743
      [1] https://github.com/openjdk/jdk/blob/d23ad01319ba298cc0ddcc2424abac8071840338/src/hotspot/cpu/aarch64/aarch64.ad#L74

            dchuyko Dmitry Chuyko
            dchuyko Dmitry Chuyko
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              Created:
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